Abstract
The density of localized states in hydrogenated amorphous silicon $(a\ensuremath{-}\mathrm{S}\mathrm{i}:\mathrm{H})$ is studied by means of the quasistatic capacitance technique applied to metal-insulator $a\ensuremath{-}\mathrm{S}\mathrm{i}:\mathrm{H}$ structures. Calculations in the framework of the defect-pool model show that the changes in the quasistatic capacitance versus gate bias curves (qs-CV curves) after bias annealing reveal the changes in the density of dangling-bond states predicted by the model, and are sensitive to the defect-pool parameters. The comparison of theoretical qs-CV curves with experimental curves obtained in a wide range of bias-anneal voltages ${V}_{\mathrm{ba}}$ on several kinds of structures (top gate oxide, top gate nitride, and the most commonly used bottom gate nitride structures) strongly support the defect-pool model, and values for the model parameters are deduced. It is shown that for all structures the dominant phenomenon for bias annealing at positive ${V}_{\mathrm{ba}}$ (i.e., under electron accumulation) is the creation of defects in the lower part of the gap in the $a\ensuremath{-}\mathrm{S}\mathrm{i}:\mathrm{H}.$ Bias annealing under hole accumulation reveals the creation of defects in the upper part of the gap of $a\ensuremath{-}\mathrm{S}\mathrm{i}:\mathrm{H},$ but the precise dependence of the qs-CV curves upon ${V}_{\mathrm{ba}}$ depends on the nature of the insulator\char21{}$a\ensuremath{-}\mathrm{S}\mathrm{i}:\mathrm{H}$ interface. In particular, it is affected by a higher density of interface trap levels in the top gate nitride structures, and by hole injection and trapping from the $a\ensuremath{-}\mathrm{S}\mathrm{i}:\mathrm{H}$ into the nitride layer in the bottom gate nitride structures.
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