The use of Petri nets as the basis of algorithm for gate level digital circuits simulation

Abstract

This paper proposes a new event driven simulation algorithm for digital integrated circuits simulation based on Petri nets modification. The proposed algorithm avoiding priority choice problem, when two or more events are occurring simultaneously. A new gate level simulation tool has been developed based on proposed algorithm. With the developed simulator three different types of the basic digital circuits was simulated, including combinational and sequential units. The obtained waveforms correspond to the results of the well-known tools for the gate level simulation.