Abstract
The traditional local oxidation of silicon (LOCOS) device isolation process is widely used in the semiconductor industry. Yet, as the need for below 0.18 microns and smaller devices increases, the stress induced leakage currents and device spacing of LOCOS becomes a severe limitation. The use of Shallow Trench Isolation (STI) has also been developed. However, recent improvements in the selective epitaxial growth dielectric isolation (SEG-DI) process have provided an alternative device isolation technique. The simpler SEG-DI process allows for higher packing density and reduced leakage current by eliminating stress. The DI-SEG process has been shown to be approximately the same cost as the LOCOS process.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
