Abstract

The compact models of junction field effect transistors (JFETs) used in release-quality versions of SPICE-like programs are focused only on the standard temperatures ranging from –60 to 150°C and are unworkable for an electronic circuit design in the cryogenic temperature range (below –120°C). It this study, the Low-T SPICE model of the JFET for designing electronic circuits in the extended temperature range, including the cryogenic range (from –200 to 110°С), is proposed. The model takes into account the changes in the I–V curves caused by the effect of ultralow temperature: growth of the saturation voltage VD sat, decrease of the pinch-off current Ip and steepness BETA, negative slope LAMBDA of the output I–V curves, increase of the drain–source resistance RD as the result of the freezing effect, etc. For this purpose, the dependences of the specified parameters on temperature are introduced in the model. The procedure for extracting the SPICE parameters of the Low-T SPICE model of the JFET is developed according to the results of the measurements of the standard set of the I–V curves in the cryogenic temperature range. The error of the calculation of the I–V curves is not higher than 10–15% in the temperature range from –200 to 110°C.

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