Abstract

The roughness at the Si–SiO2 interface has been determined quantitatively on an atomic scale by SPA-LEED (spot profile analysis of low energy electron diffraction) in ultrahigh vacuum after removal of the oxide. At the Si–SiO2 interface the steps are randomly distributed. With the help of model calculations the measured spot broadening provides the step atom density and therefore the roughness on an atomic scale. The roughness will be decreased by low oxidation rates (thick oxides, dry atmosphere) and appropriate annealing in N2 and will be increased by high oxidation rates (thin oxides and wet atmosphere). Furthermore metal oxide semiconductor (MOS) structures were built on chips which were also suited for LEED measurements. Hall mobilities for Si(111) p-channel inversion layers MOS-FETs with varying roughness at the Si–SiO2 interface have been measured at temperatures between 4.2 K and room temperature. It was found that there exists a strong correlation between Hall mobility and atomic roughness at high inversion, nearly a proportionality. Even at room temperature the transistors with the lower interface roughness exhibit the higher mobility. Further quasistatic capacitance–voltage (C–V) measurements have been performed on Si(111) MOS structures with different but well-known atomic roughness. The results demonstrate a strong correlation between atomic roughness and interface state density too, even after an additional postmetallization-annealing (PMA) treatment. A simple model which is associated with each kind of step atom, i.e., edge or kink atoms, suggests the creation of a dangling bond and therefore, a surface state can explain the result. Assuming that ionized atoms which are responsible for Qfix are located preferentially at those steps or kinks which are also correlated to the dangling bonds at the interface, we confirm the general opinion that Qfix and surface states have at least one common physical origin: the atomic roughness.

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