Abstract
Small area resonant tunneling diodes (RTDs) with strained Si/sub 0.4/Ge/sub 0.6/ potential barriers and a strained Si quantum well grown on a relaxed Si/sub 0.8/Ge/sub 0.2/ virtual substrate were fabricated and characterized. A room temperature peak current density (J/sub P/) of 282 kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with a peak to valley current ratio (PVCR) of 2.43 were recorded for a 5×5 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> sample, the highest values reported to date for Si/Si/sub 1-x/Ge/sub x/ RTDs. Scaling of the device size demonstrated a decrease in J/sub P/ proportional to an increase in the lateral area of the tunnel junctions, whereas the PVCR remained approximately constant. This observation suggests that the dc behavior of such Si/Si/sub 1-x/Ge/sub x/ RTD design is presently limited by thermal effects.
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