The Role of Geometry Parameters and Fin Aspect Ratio of Sub-20nm SOI-FinFET: An Analysis Towards Analog and RF Circuit Design

Abstract

Nowadays FinFETs integrated into complex circuit applications can fulfill the demand of smartphones and tablets for better performance and make chips that can compute faster. This paper studies the impact of $H_{{\rm Fin}}$ and $W_{{\rm Fin}}$ variations on various performance matrices including static as well as dynamic figures of merit (FOMs). With the help of aspect ratio ( $W_{{\rm Fin}}/H_{{\rm Fin}}$ ), the device is branched into three parts, i.e., FinFET, Trigate, and Planar MOSFET. This unique report is a presentation of a detailed analysis about the impact of fin height ( $H_{{\rm Fin}}$ ) and width ( $W_{{\rm Fin}}$ ) on various performances including the dc as well as ac FOMs. The static or low-frequency performances like threshold voltage ( $V_{{\rm th}}$ ), on current ( $I_{{\rm on}}$ ), off current ( $I_{{\rm off}}$ ), power dissipation, transconductance ( $g_{{\rm m}}$ ), output conductance ( $g_{{\rm d}}$ ), transconductance generation factor ( $TGF = g_{{\rm m}}/I_{{\rm D}}$ ), early voltage ( $V_{{\rm EA}}$ ), gain ( $A_{{\rm V}}$ ), and dynamic or high-frequency performances as gate capacitance ( $C_{{\rm gg}}$ ), cutoff frequency ( $f_{{\rm T}}$ ), output resistance ( $R_{{\rm 0}}$ ), intrinsic delay are systematically presented with the variation of device geometry parameters. The results presented in this paper can be of great help to device engineers in designing 3-D devices as per their requirement.