Nanoscale MOSFET modeling for the design of low-power analog and RF circuits

Abstract

This paper presents the simplified charge-based EKV MOSFET model and shows that it can be used for advanced CMOS processes despite its very few parameters. The concept of inversion coefficient is then presented as an essential design parameter that spans the entire range of operating points from weak via moderate to strong inversion, including the effect of velocity saturation. It is then used to describe the basic trade-offs faced in the design of single-stage amplifiers between bias current and transconductance, gain-bandwidth and thermal noise. Several figures-of-merit based on the inversion coefficient, especially suitable for the design of low-power analog and RF circuits, are then presented. These figures-of-merit incorporate the various trade-offs encountered in analog and RF circuit design and can be used as design guidelines for optimizing a design. Finally, the simplicity of the inversion coefficient based analytical models is emphasized by their favorable comparison against measurements of commercial 40-nm and 28-nm bulk CMOS processes and with simulations using the BSIM6 model.