Abstract
Many computer hardware manufacturers can adequately characterize the reliability of today's solder interconnect. However, the procedure is often one requiring a lengthy and complicated accelerated test. The alternative to performing an accelerated test is the use of validated predictive models. These models can be complex requiring specialized analytical skills of the user. An alternate approach is proposed and developed here. One in which the reliability of a package/solder interconnect can be predicted through a series of coupled graphs, i.e., pkg., thermal perf/spl rarr/pkg. structural perf/spl rarr/interconnect reliability. The thermal and structural performance graphs are generated through the use a package/printed wiring board (PWB) finite element model while the interconnect reliability graph uses the Norris-Landsberg model. The coupled figures are known collectively as a nomograph. Nomographs for plastic ball grid array (PBGA), plastic quad flat packs (PQFP), thin small outline packages (TSOP), ceramic ball grid array (CBGA), and ceramic column grid array (CCGA) packages are presented.
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