Abstract

The piezoresistive effect in n-type silicon nanowires on silicon-on-insulator wafers, also called junctionless nanowire transistors (JNTs), is investigated. A marked change in the subthreshold drain current for strained JNTs is observed. This change can be attributed to strain-induced interface state modification, due to an increase in the interface state for tensile strain or a decrease in the trap activation energy for compressive strain. Through many long-time cycles of compressive and released strain, the electromechanical response of subthreshold IDS with time is found, thus supporting the widely reported giant piezoresistance effect. In addition, JNTs involving a back-gate and an additional top-gate electrode may become a new prospect for high-precision sensor applications and next-generation multigate transistors.

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