THE OUTPUT NOISE REDUCTION OF A FLASH ANALOG-DIGITAL CONVERTER

Abstract

A new approach to reducing output noises in the Flash analog-digital converter (ADC) is presented. A type of ADC with the least amount of noise is Flash ADC, but it also needs to have noises as less as possible. By using this method in 32nm technology, the area of the circuit increases by 72% and the noise error decreases by 63%. This method is very preferable to use for high bit Flesh ADC circuits, as the latter have many logic cells in the Encoder. Switching inputs of those cells leads to high noises in the output.