Abstract

The impact of different orientational angle of ion incidence on SEU and MCU are studied in dual DICE SRAM according to directionality of different sensitive pairs. The results show the worst orientational angle for SEU and MCU in dual DICE SRAM is incident with large tilting angle along the well even if nodal spacing of N/P sensitive pairs is the smallest. Ion tilt incidence with this orientational angle will greatly decrease SEU threshold and increase SEU cross section. At high LET, SEU saturation cross-sections in dual DICE design only has a small improvement by 40% over 6-T design whether ion incidence is normal or tilt due to charge sharing. Based on MCU topological pattern in dual DICE and 6-T design, the extent of charge diffusion and pararistic bipolar effect is quantified. Implications and application of the results for heavy ion SEU testing and RHBD technique in nanometer technology are presented.

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