The optimization of roll-bond cold plate based on Taguchi-grey theory for server chips thermal management

Abstract

The roll-bond cold plate, an economical and straightforward electronics liquid cooling approach, is highly promising to address the increasing electronics chip thermal management challenges. However, the roll-bond cold plate with staggered cellular flow channels, while having a sizable solid-liquid contact area and high heat dissipation potential, suffers from inadequate temperature uniformity and fluidity. This study addresses flow and temperature uniformity issues in current roll-bond cold plates by proposing a design—Direct Liquid Cooling Roll-Bond Plates (DLCRBP) tailored for high-performance server architectures. To investigate how regional combination, cellular diameter, and longitudinal spacing affect both thermal and flow performance, orthogonal experiments with diverse flow channel structures were conducted using the Taguchi-grey theory. COMSOL-based numerical simulation were used to analyze these experiment conditions. Multi-objective optimization, considering pressure drop, heat source temperature uniformity, and coolant temperature difference, was then performed using the grey correlation method. The optimized DLCRBP (A3B5C1) was fabricated, and its performance was compared with the staggered cellular DLCRBP (SCS), which is the control group without optimization, under various inlet flow velocities, heat source powers, and coolant inlet temperatures. Experimental comparisons illustrate that the optimized structure ensures outstanding temperature uniformity even at low inlet flow velocities. Specifically, at an inlet flow velocity of 0.2 m/s, the average and maximum temperature differences on the heat source's upper surface are 36.5 % and 75.3 % lower, respectively, compared to pre-optimization levels. Furthermore, A3B5C1's temperature uniformity improves with higher coolant inlet flow velocity and lower coolant inlet temperatures. At a coolant inlet flow velocity of 0.5 m/s or higher, A3B5C1 sustains the surface temperature of a 600 W chip below the thermal design's safe temperature of 77.8 °C, highlighting its enhanced performance.