Abstract

The Josephson balanced comparator is the key component of Single Flux Quantum logic devices because it is the decision making element. It is formed by two Josephson junctions (JJs) connected in series from a clocking perspective and in parallel for the current to be measured. Its noise properties are crucial for the performance of logic devices. The balanced comparator can also be used to monitor the fab process and design implementation as an indicator of excess noise, overheating, linearity, dynamic effects, etc. We designed several test structures to measure the comparator gray zone at different fabrication process nodes at MIT-LL. We used digital circuitry to measure comparator characteristics at low frequencies. An analog testbed was used to perform high-frequency characterization. Experimental results for different current densities, sheet resistances, damping and clock frequencies are presented.

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