The isolation feature geometry dependence of reverse gate-leakage current of AlGaN/GaN HFETs

Abstract

Reverse gate-leakage current of AlGaN/GaN heterojunction field-effect transistors (HFETs) realized on array of submicron sized fins and conventional mesa isolation feature geometries is investigated at room temperature and zero drain-source bias. For each of the abovementioned device categories, the significance of leakage from the top surface gate as well as gated etched GaN surfaces, especially sidewalls, is studied for a wide range of gate-source voltages (VGS) (i.e. below and above the threshold voltage). It is proven that in the explored fin-type HFETs, for all values of VGS leakage through the gated GaN surfaces, especially the sidewalls, is more significant than the leakage from the top surface gate. This is while in the mesa category, the sidewall leakage is of importance only at less negative values of VGS, and leakage from the top surface gate substantially takes over at more negative VGS values. The discrepancy in the dominance of the aforementioned leakage paths at more negative VGS values among the explored fin and mesa-type HFETs is demonstrated to be due to the stronger electric field across the barrier in the gated region of the mesa-type HFET for this range of VGS. While in the explored fin-type HFETs Ion/Ioff ratio is as high as 2 × 107, the total amount of reverse gate-leakage at all values of VGS is substantially larger compared to the mesa category sharing an equal value of the overall gate width, which substantiates the significance of leakage through etched GaN surfaces in devices composed of larger number of sidewalls, incorporating larger area of gate-overlapping etched GaN surface.