Abstract
A new parallel architecture is presented that is more flexible than the systolic array: the Instruction Systolic Array (ISA). In the ISA the instructions (instead of data, as in a systolic array) are pumped through an array of processors. While systolic arrays are special purpose architectures, the ISA is more universal: It is capable of executing different programs. The Instruction Systolic Array is well suited for implementation in VLSI technology.
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