Abstract
With the development of electronic packaging technology, devices become much smaller size and higher integration, and the reliability of devices has become one of the most concerned issues. Interfacial delamination has become one of the significant factors influencing the reliability of devices in System-in- Package (SiP) module with the rapid development of the fifth generation (5G) technology. In this work, a method for interface delamination modeling considering cure shrinkage and viscoelasticity was proposed, which could predict the interfacial delamination accurately. Combining the theoretical calculation formula and the warpage test results, the cure shrinkage rate of the Epoxy molding compound (EMC) was calculated. The parameters of EMC viscoelastic constitutive model (Maxwell model) were obtained by Dynamic mechanical analysis (DMA) test. Based on the Finite element analysis, the warpage deformation during reflow process was simulated by adjusting the CTE value of the EMC until it was consistent with the actual results from of shadow moiré test. Furthermore, using the cohesive force zone modelling (CZM), simulation for interface delamination of Cu/EMC was carried out by using ABAQUS. The influences of residual stress of cure shrinkage and viscoelastic of EMC at high temperature on the delamination failure of the device were also considered.
Published Version
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