Abstract
We have studied the effect of process parameters on uniformity and reproducibility in the engineered barrier ramp-edge Josephson junctions with YBa2Cu3Ox electrodes. The engineered barrier is formed during an etching and annealing process. We investigate excess currents in the junctions by analysing the magnetic field modulations of critical current. The observed excess currents in this study decrease exponentially with increasing annealing temperature. We thus speculate that these excess currents flow via superconductive pinholes in the barrier of the interface-engineered junction (IEJ) due to the formation of CuO2 plane which is formed during the barrier formation. We try to patch these pinholes by substituting Cu and Y for Ga and Pr, respectively. We have found that deposition of amorphous PrGaO3 (PGO) in the IEJ barrier dramatically decreases the excess current.
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