Abstract

The paper describes the design and application cryptographic algorithm of SMS4 and Camellia by using the FPGA partial reconfiguration technology. The design and simulation implement on Xilinx VirtexII-Pro XC2VP30 FPGA development board, and the test results show the validation of design. SMS4 uses the 1061 slices and Camellia uses 2148 slices. The UART test platform we developed is use to verify the reconfiguration status and results. The reconfiguration algorithm shows the balance between high performance and low complexity in area. The theoretical and practical research of dynamic partial reconfiguration has a broad space for development and application prospect in information security domain.

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