Abstract
The impacts of the two major high temperature treatments on the characteristics of thin film transistors (TFT's) in the back-end process of ultra large scale integrated circuit (ULSI) technology have been investigated. TFT's without any high temperature treatment show poor characteristics. High temperature furnace annealing and rapid thermal annealing (RTA) which are performed for boron phosphorous tetra ethyl ortho silicate (BPTEOS) planarization can improve the characteristics of low temperature recrystallized TFT. Then, the technologies used for contact annealing result significant difference on the characteristics of TFT's. High temperature furnace contact annealing can still greatly improve the characteristics of TFT's. However, after furnace annealing for BPTEOS planarization, RTA contact annealing deteriorates the characteristics of TFT. High temperature furnace annealing for BPTEOS planarization improves the charge to breakdown (Q bd) value of the gate oxide of TFT and so does the furnace contact annealing. However, RTA contact annealing performed after the furnace planarization flow deteriorates that of the gate oxide.
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