Abstract
In this paper we have used a fully ballistic quantum mechanical transport approach to analyse electrical characteristics of rectangular silicon nanowire field effect transistor in 7 nm gate length. We have investigated the impact of structural parameters of Gate all around Silicon nano wire transistor (GAA-SNWT) on its electrical characteristics in subthreshold regime. In particular we have shown the effect of increasing the Source/Drain and channel length (L(S), L(D) and L(Ch)) on short channel effects as well as change in body thickness and independent back gate voltage. We also investigate the effect of increasing the gate underlap on the electrical characteristics and on the switching speed of device. We show that if the Lun is increased the gate capacitance and DIBL will reduce while the I(ON)/I(OFF) ratio is increased.
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