The Impact of Random Telegraph Signals on the Threshold Voltage Variation of 65 nm Multilevel NOR Flash Memory

Abstract

In this work, the threshold voltage (Vt) variation caused by random telegraph signals (RTS) in 65 nm multilevel (MLC) nor flash memory is discussed. The relationship of RTS amplitudes and the positions of the cells in the Vt distribution is investigated by bit mapping test method, which shows that the channel dopant fluctuation aggravates the RTS impact on the cell's Vt control. Channel doping engineering is introduced to suppress RTS Vt variation in 65 nm Nor MLC flash memory. As a result, the RTS Vt variation is reduced from 0.50 to 0.26 V.