Abstract
Control of threshold voltage (Vth) is a common and serious problem for realizing scalable LSIs with either nitrogen rich SiON, high-k gate dielectrics, or metal gates. In this paper, we demonstrate the improvement of HfSiON pMISFETs characteristics with the F incorporation technique, which may prove to be a powerful tool for lowering |Vth| in pMISFET with both poly-Si and metal gates. Using F implantation in the channel region prior to HfSiON formation, |Vth| lowering up to ~200mV is obtained without mobility degradation. In the same manner as the F incorporation technique, N incorporation is useful for reducing Vth value in nMISFETs. Furthermore, the impact of F incorporation in HfSiON is investigated in terms of reliability. From a comparison of the F incorporation effect on SiON and HfSiON gate dielectrics, we have proposed a model for the F passivation of defects in both HfSiON and the HfSiON/Si interface.
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