Abstract

A programmable VLSI processor is described for efficiently computing a variety of kernel operations for speech recognition. These operations include dynamic programming for isolated and connected word recognition using both the template matching approach and the Hidden Markov Model (HMM) approach, dynamic programming for natural language models, and metric computations for vector quantization and distance measurement. As well as being able to efficiently compute a wide class of speech processing operations, the architecture is useful in other areas such as image processing. Working chips have been produced using 1.5 µ CMOS design rules that combine both custom and standard cell approaches.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call