The FPGA Design and Implementation of Pipeline Image Processing in the GPU System

Abstract

In the GPU system, pipeline image processing is facing the problem that a large amount of data to be processed, complicated processing procedure, more data transmission channels, and etc. All of these lead to low processing speed and large circuit area. This paper proposed a FPGA design of the pipeline image processing in GPU. The design has been implemented by foam extrusion pipeline architecture and validated on Xilinx Virtex XC6VLX550T FPGA. The results show that the consumption of resources is 390726.09 and the speed is 200MHz.