Abstract

The Mo-based metal inserted poly-Si stack (MIPS) structure is an appropriate choice for metal gate and high-k integration in sub-45 nm gate-first CMOS device. A novel metal nitride layer of TaN or AlN with high thermal stability has been introduced between Mo and poly-Si as a barrier material to avoid any reaction of Mo during poly-Si deposition. After Mo-based MIPS structure is successfully prepared, dry etching of poly-Si/TaN/Mo gate stack is studied in detail. The three-step plasma etching using the Cl 2/HBr chemistry without soft landing step has been developed to attain a vertical poly-Si profile and a reliable etch-stop on the TaN/Mo metal gate. For the etching of TaN/Mo gate stack, two methods using BCl 3/Cl 2/O 2/Ar plasma are presented to get both vertical profile and smooth etched surface, and they are critical to get high selectivity to high-k dielectric and Si substrate. In addition, adding a little SF 6 to the BCl 3/O 2/Ar plasma under the optimized conditions is also found to be effective to smoothly etch the TaN/Mo gate stack with vertical profile.

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