Abstract
The electrical and structural properties of HfO2/SrTiO3 composite gate dielectric are discussed for achieving higher dielectric constant to reduce equivalent oxide thickness (EOT) as well as to tune threshold voltage (VTH) in n-type metal oxide semiconductor transistor. Compared to atomic layer deposited (ALD) HfO2 alone, adding 0.5–1.0nm sputtered SrTiO3 layer into ALD HfO2 gate dielectric attains EOT scaling down to about 0.6nm, ~700mV negative VTH shift, comparable gate leakage current at both fixed 1V and VTH+0.8V overdrive conditions and electron mobility with of 137cm2/V.s at 0.6nm EOT. This is attributed to the significant modification of the interfacial layer (IL), resulting from Sr diffusion into sub-SiOx IL during subsequent anneal in gate-first transistor processes. It leads to SrOx IL formation between high-k gate insulator layer and Si substrate, where its dielectric constant is about three times higher than that of SiOx IL.
Published Version
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