Abstract
High voltage power transistors were produced using epitaxially grown Si wafers which contain many stacking faults in base region. The reverse biased characteristics of the emitter-base and the base-collector junctions of these transistors showed “soft” breakdown under a sufficiently high reverse bias. A detailed analysis of the effect by stacking faults was carried out with a scanning electron microscope (SEM). It was observed that the junctions of the transistors are not uniform by the stacking faults.
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