The Effect of Threading Dislocation on Current-Voltage Characteristics of 3.3kV 4H-SiC Schottky Barrier Diode

Abstract

Silicon carbide (SiC) is an attractive semiconductor for high-power, high-temperature, and high-frequency electronic devices due to its wide bandgap, high breakdown electric field, and high thermal conductivity. However, the development and commercialization of SiC-based devices are slow due to SiC defects. SiC growth technology has also been developed so much that killer defects, including micropipes, triangular defects and basal plane dislocation that degrade device performance, have been reduced. Although many researches have reported the degradation of devices performance caused by various crystal defects in SiC, the studies on the effect of threading dislocations (TDs) is still insufficient [1,2]. In this paper, we studied the effect of TDs on current-voltage (I-V) characteristics of 3.3 kV 4H-SiC Schottky barrier diodes (SBDs). The 3.3 kV SBDs were fabricated on a n-type 4H-SiC epitaxial wafer. The thickness of epitaxial layer was 28 um and its doping concentration 1 × 1015 cm-3. The boron (NA: 2.0 × 1018 cm-3) was implanted to form the junction termination extension (JTE) that helps to reduce electric field crowding at Schottky metal edge. The aluminum (ND,max: 5.0 × 1019 cm-3) was implanted to form ohmic contact for robust reverse blocking at the periphery of active region. The ion-implanted samples were annealed at 1700 °C for 60 m in Ar ambient. Nickel (Ni) was firstly depotied to form the front-side ohmic contact and cathod electrode, and annealed at 950 °C. Schottky metal, Ni, is deposited and then wet-etched to define the active regions. Post-annealing was performed at 300 °C. The crystal defects and process defects caused during diode fabrication on the active region were observed using electron beam induced current (EBIC) and X-ray topography (XRT). The I-V measurement were performed for forward and reverse I-V charateristics. To study the effet of dislocation on electrical properties of fabricated SBDs, I-V characteristies were analyzed. The Schottky barrier height (SBH) and ideality factor (IF) were extracted from forward characterisitics. The extracted average SBH and IF of SBDs were 1.5 eV and 1.05, respectively. The average leakage current was about 10-12 A at the reverse bias of -100V. The breakdown voltages increased with the length of JTE. The observed maximum breakdown voltage was 4.6 kV. The defects in acvitve region of all measured devices were analyzed using XRT technique to compare with electrical characteristics. The TDs did not affect the forward I-V charcteristecs. However the process defects degraded the forward characteristics, such that the ideality factor was increased from 1.05 to 1.4. These process defect significantly increased the leakage current to 10-7 A and reduced the breakdown below 1 kV. Therefore, the process defects during fabrication are fatal to the device performance. The leakage current of the devices observed TDs at active region increased compared with devices without defect. The breakdown voltage of fabricated 3.3 kV SBDs was not significantly affected by crystal defects. This meas that the TDs are not fatal defect for SBDs having rating breakdown voltage of 3.3 kV. Nevertherless, the increase in the leakage current of a device having the TDs may cause long-term reliability issues. Therfore, it is necessary to determine allowable type of defects and their defect density for highly reliable SiC power devices. [1] H. J. Jung, S. B. Yun, I. H. Kang, J. H. Moon, W. J. Kim, W. Bahng, Mater. Sci. Forum, 821-823 (2015) 563-566. [2] H. Fujiwara, H. Naruoka, M. Konishi, K. Hamada, T. Katsuno, T. Ishikawa, Y. Watanabe, T. Endo, Appl. Phys. Lett., 100 (2012) 242102. Figure 1