The Effect of Multilayer Patterns on Thermal Stress During Rapid Thermal Processing

Abstract

AbstractMultilayer patterns can lead to temperature non-uniformity and undesirable levels of thermal stress in silicon wafers during rapid thermal processing (RTP). Thermal stress can, in turn, cause problems such as photolithography overlay errors and degraded device performance through plastic deformation. In this work, the temperature and stress fields in patterned wafers are simulated using detailed finite-element based reactor transport models coupled with electromagnetic theory for predicting radiative properties of multilayers. The temperature distributions are then used to predict the stress fields in the wafer and the onset of plastic deformation. Results are presented for two generic two-dimensional axi-symmetric reactors employing single and double side illumination. The effect of patterns and processing parameters are explored, and strategies for avoiding pattern induced plastic deformation are evaluated.