Abstract

Chemical mechanical polishing (CMP) is a critical nanomanufacturing process used to remove or planarize ultrathin metallic, dielectric, or barrier layers on silicon wafers. The CMP process is a vital interim fabrication step for integrated circuits and data storage devices. One of the major shortcomings of existing CMP models is that they do not account for crystallographic effects of the thin film metal materials when predicting material removal rates. This work investigates the effect of the microstructure on the CMP of copper and metal thin films on silicon wafer. Nanoindentation tests were conducted to measure the hardness variations across a wafer surface due to the crystallography of the metal films. Spatial variation of mechanical properties was also input into an existing multi-scale CMP model. Nano-characterization and CMP experimental results are presented and compared to an existing CMP wear model.

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