The effect of interface states, at mid-gap, in p-silicon/SiO 2 junctions

Abstract

Conductance-voltage and capacitance-voltage measurements of SiO 2/p-Si metal-insulator-semiconductor (MIS) diodes are presented. Quantitative derivation of the usual U-shaped density of interfaces is made, but measurement shows in addition: an increase in the inversion capacitance at relatively high frequencies; a second peak is observed in the conductance-voltage characteristic at low frequencies. The first peak in depletion corresponds to the U-shaped density of interface states. Both of these effects are related to the distribution of trapping states in the vicinity of the interface and the silicon depletion region. It is postulated that a high density of interface states exists near mid-gap through which minority carriers can be generated. It is this generation of minority carriers which causes the second peak in the conductance and also the rise in the inversion capacitance, through contributions to the latter might well come from bulk states in the silicon depletion region.