The effect of gate voltage boosting on the power efficiency of multi-context FPGAs

Abstract

Gate voltage boosting has been routinely used in FPGAs to increase the performance and energy efficiency of pass transistor circuits. The boosting technique is used either alone or in conjunction with level restorers to restore pass transistor outputs to the supply voltage level, which can lead to significant improvement in the power-delay product. Gate voltage boosting is achieved in conventional FPGAs by powering the configuration memory with the boosted voltage and boosted data coming from the configuration memory is directly applied to the gates of the routing multiplexers. In multi-context FPGAs, however, configuration memory data need to pass through the context switches before it can be applied to the routing multiplexers. Passing boosted signals through the context switches can result in significantly higher power consumption, which can be a major concern in multi-context FPGAs. As a result, this work investigates the removal of gate voltage boosting from FPGAs and compares the energy efficiencies of the boosted FPGAs and FPGAs without boosting for multi-context FPGAs. We found that if frequent content switching is required then non-boosted multi-context FPGAs with a larger number of configuration contexts achieve lower power-delay-product compared to boosted multi-context FPGAs. In particular, for single-context FPGAs, boosted FPGAs have 15%–65% lower power-delay product than FPGAs without boosting. Boosted multi-context FPGAs maintain this advantage if the context switching is done infrequently. This advantage, however, reduces if the context switching is done more frequently and, at the same time, boosted FPGAs also become less efficient in terms of power-delay-product as the number of configuration contexts is increased. For ten configuration contexts, FPGAs without boosting can achieve 2%–35% lower power-delay product compared to boosted FPGAs if the context switching is performed every clock cycle and this advantage continues to rise as the number of configuration contexts is increased. Furthermore, FPGAs without boosting also have the advantage of achieving higher logic capacity compared to boosted FPGAs. Under the same power budget, for ten configuration contexts, FPGAs without boosting achieve 1.2–2 times higher logic capacity compared to boosted FPGAs.