The development of the Front-End Boards for the small-strip Thin Gap Chambers detector system of the ATLAS Muon New Small Wheel upgrade

Abstract

The ATLAS experiment at CERN is scheduled to replace the innermost station of its Muon Spectrometer in the forward region during its Phase-I upgrade in order to enhance the capabilities on triggering and tracking of high transverse momentum muons towards high luminosity LHC runs. The New Small Wheel (NSW), a completely new detector system to be built, is composed of two novel gaseous detectors: Micro-mesh Gaseous Structure (Micromegas) and the small-strip Thin Gap Chamber (sTGC). The sTGC sub-system is the primary trigger detector. It will be equipped with radiation-tolerant, low-latency electronics for reading out over 400,000 channels to identify the bunch crossing time of proton-proton collisions spaced by 25 ns, as well as to collect fine strip charge information for the charged track reconstruction. In this paper, we present the design and development of a set of Front-End Boards (FEBs) for the sTGC detector system. The major challenges in the design will be discussed. These include the accommodation of a few hundred readout channels per single board in a very constrained space, a tight requirement for the Electrostatic Discharge (ESD) protection of 130 nm ASICs, and customized analog input circuits to handle the high rate and high charge signals from the sTGC detectors. Moreover, the FEBs have to incorporate a few hundred parallel inter-chip links at 320 Mbps and several low-latency serial links operating at 4.8 Gbps for the Level-1 and trigger data readout. The characterization of the FEBs performance, both off-detector and on-detector, will be shown.