The design of dual-core PLC SoC and application on Launch Control System

Abstract

The PLC(Programmable Logic Controllers) have been used widely in the Launch Control System of launch vehicles. All the products of PLC are COTS(Commercial Off-the-Self) products, which cannot meet the requirement of the Launch Control System in the launch site with tough environment (for example, Salt Spray environment), especially the tightness, power cost and reliability and so on. According to the research of the Ladder Diagram and the Function Block Diagram, a Hardware Logic Solver model for the Ladder Diagram is proposed and is implemented as a Ladder Diagram processor. In order to process the Function Block Diagram, a general processor is integrated with the Ladder Diagram processor as a dual-core SoC(System on a Chip) named PLC SoC. The PLC SoC is implemented on 0.18um AISC process, and the top frequency can reach 120MHz. With application on Launch Control System, the BOOLEAN logic process speed of the PLC SoC can be more than 10 times than a COTS PLC CPU module (with Intel Pentium III), and the power cost of the PLC SoC is less than 0.1 the power cost of the COTS product.