The design of a microprocessor-based access logic for the Cambridge ring

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The University of Keele has installed a 10 Mbit/s Cambridge ring local area network. Briefly, this network consists of a number of nodes, each of which presents a dual 16-way parallel data bus interface to the ring; an ‘access logic’ interfaces the above bus to the host computer. This paper describes the design of a Z80-based access logic. Hardware techniques are used to implement low level protocols, in order to achieve data transfer rates commensurate with potential ring bandwidth. The design is relatively straightforward, but the rationale has evolved from much detailed study of the ring at Keele.