The dependency notation as a graphical description language for logic design and silicon compilation

Abstract

The graphical symbolism of the depedency notation as stated in the IEC standard 617-12 can be used as a graphical design language for LSI circuits. The use of dependency notation with automatic cell compilation tools can make the human interface of electronics workstations easier to use and learn. This paper describes the use of dependency notation graphics as an architectural description tool in complex logic hardware design. Then an experimental CAD tool for dependency notation and automatic cell compilation called DEMET is introduced.