Abstract

Reduced Instruction Set Computers (RISCs) offer more performance per transistor than conventional Complex Instruction Set Computers (CISCs). There are now many examples of this advantage being exploited in the design of processors for high-end engineering workstations, where the RISC approach allows greater performance to be extracted from a single integrated circuit than could be obtained from a CISC processor based on the same silicon technology. Acorn has used the inherent advantage of RISC technology in a different way. The RISC approach allows 32 bit processing power to be offered at much lower cost than was possible with a CISC, because of the smaller die size required to implement the processor. The availability of this power allows system functionality to be moved from hardware to software, which in turn simplifies the support chips and further reduces system cost. A complete RISC system has been designed to partition efficiently onto four custom chips. The chipset combines with standard memory devices to deliver superminicomputer processing performance, with full support for multi-tasking and virtual memory, at a similar silicon cost to standard PC.

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