TH Express-2 reaches new heights for supercomputer interconnects

Abstract

Modern supercomputers are highly dependent on parallel processing to boost their performance, and thus are all effectively parallel computers. The basic architecture of a parallel computer is composed of two parts: a single processor architecture and a communication architecture [1]. The latter is mainly implemented and supported by the interconnection network. During the design of an interconnection network, the following aspects must be considered carefully: (i) The communication requirements of the system, and the type of communication abstract that will be delivered to the programmer. (ii) The performance requirements of the network, in terms of both pointto-point communication and collective communication performances, ensure that the overall system is balanced with respect to communication speed and computation speed. (iii) The type of interconnection topology required to reduce the average distance between nodes (and thus reduce communication latency) while maintaining a moderate number of links (enabling increased communication bandwidth without making the implementation overly complex). (iv) The type of communication protocol to be used, including the routing algorithm (how to deliver messages from one node to another) and the flow control mechanism (how to handle congestion when it occurs in network traffic). (v) Implementation of the network with appropriate building blocks, including host interfaces, switches, routers, and electrical or optical cables.