Abstract
This paper presents new test and verification methodologies, including design techniques targeting a neural oscillator. Because the output signal of a neuron is chaotic, customized verification and test methodologies are required. We have chosen to use MATLAB to verify our experimental results at a simulation level. In this paper we also describe a test circuit used to perform electronic neuron IC testing. We investigate how a subthreshold circuit can reduce power consumption. In our HSPICE simulations, we both validate the proposed test circuit and verify the electronic neuron and synapse circuit.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
