Abstract

In this paper, the second part of the software library for the Ternary combinational logic components will be built based on VHDL language starting by the TXOR (Ternary XOR gate) and ending by the TPA (Ternary Parallel Adder). This second part is an extension to the library given in the first part of the study which was about the basic Ternary Logic Gates [1].
 Keywords: Ternary logic, Ternary combinational logic components, VHDL language.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.