Temporary Bonding and Debonding Technologies to Enable Innovative Fan-Out Embedded Interposer for High-Density Applications

Abstract

As requirements increase for mobile devices to be lighter and thinner and to operate at high speed and high bandwidth, innovations in wafer-level packaging have evolved to 3-D structures, such as package-on-package (PoP), fan-out integration, and through-silicon-via (TSV) interposer architectures. However, wafer-level packaging is still considered to be costly and slow in throughput due to wafer size limitations. In this study, temporary bonding and debonding processes using mechanical or laser release technologies were applied in the fabrication process of an integrated embedded glass interposer as a foundation for 3-D integrated circuit (IC) packaging on panel-level packaging. Glass interposers having dimensions of 10 mm × 10 mm and a thickness of 120 μm were fabricated. The interposers had through-glass vias (TGVs) 25 μm in diameter and 3000 I/O pads of copper under-bump metallization (UBM) and were designed as a nearly full-array type. The interposers were supported by a temporary bonding material on silicon or glass wafers and embedded by built-up dielectric material on which fan-out redistribution circuit layers were deposited. For forming the pattern of the redistribution layer, a UV laser was used to form 75-μm-diameter blind vias, and conductive interconnections were made by a semi-additive process (SAP) using photolithography and electrolytic copper. The process of building up layers from the glass interposer to form an embedded fan-out interposer can eliminate a joining process required by traditional 2.5-D IC integration. Finally, the embedded fan-out carrier is separated from the glass or silicon wafer through a laser debonding process. An experiment to study the correlation of bonding material and release material with built-up lamination in backside processes will be discussed in this paper to address full process integration on panel-size substrates. The combination of temporary bonding technology with mechanical or laser release technologies will pave the way for realizing cost-effective 3-D IC packaging on panel-level substrates.