Abstract

In order to make the most of the increasing computational power of recently developed quantum computers, it is crucial to perform an efficient mapping of a given quantum circuit that realizes the desired quantum algorithm to the targeted quantum computer (so-called technology mapping). In most cases, the limitations of the targeted quantum hardware have not been taken into account when generating these quantum circuits in the first place. Thus, the technology mapping is likely to induce a considerable overhead for such circuits in order prepare them for the execution on the actual device. In this work, we consider the realization of reversible circuits consisting of multiple-controlled Toffoli gates on IBM quantum computers. Using templates for the realization of the reversible/quantum gates allows to perform a topology-aware decomposition of MCT gates that exhibits the potential of significant reductions of the technology mapping overhead.

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