TEMPERATURE MODELING OF GaAs DCFL

Abstract

Direct-Coupled FET Logic (DCFL) is an important logic family for LSI GaAs FET circuits because of its simple structure and good speed/power performance. Since it is especially sensitive to temperature shifts of performance, accurate temperature modeling is critical for design of DCFL circuits. Using a version of SPICE modified to include FET temperature dependence, the performance of DCFL is simulated over temperature and compared with measured results. In addition, an improved version of DCFL known as E-E Logic (Enhancement-Enhancement Logic) is modeled over temperature. The performance of E-E Logic is compared to DCFL with depletion-mode FET and saturated resistor loads over temperature. E-E Logic is found to offer improved yield, power dissipation and performance control compared to conventional DCFL.