Temperature associated reliability analysis of a Si/Ge Heterojunction Dopingless Tunnel FET considering Interface Trap Charges

Abstract

This manuscript investigates the effect of variations in temperature and interface trap charges (ITC) on the analog and radio-frequency (RF) performance parameters of a Si/Ge heterojunction(HJ) asymmetric double-gate (ADG) dopingless (DL) tunnel field-effect transistor (TFET) with high-κ gate dielectric and abbreviated as HJ-ADG-DLTFET in the manuscript. The HJ-ADG-DLTFET makes use of small bandgap source material (i.e., Germanium (Ge)) instead of Silicon (Si). Consequently, increment in band-to-band tunneling (BTBT) and hence drain current flowing across source-channel tunneling junction, due to Si channel. The simulation is done by utilizing Silvaco ATLAS device simulator at various ITC density and polarity and, for a broad temperature spectrum from 200 – 400 K. The results illustrate that higher PITC (Positive ITC) density degrades device performance enormously. Furthermore, temperature variations for the range from 200 – 400 K demonstrate the degradation of the off-state current for HJ-ADG-DLTFET.