Technology Education Challenges and Solution to Design a Process Design Kit for Digital CMOS Technology in Vietnam

Abstract

In the electronic field, the complexity of Integrated Circuits design continues to increase. Therefore, the full-custom design is not feasible in most cases and replaced by semi-custom design. The main component in the semi-custom design is Process Design Kit (PDK) digital. In developing countries in Southeast Asia such as Vietnam, it is a challenge to approach semi-custom design in education at university because of PDK digital’s cost or license. This paper discusses how to design a Process Design Kit digital for CMOS 180nm technology which is used in the semi-custom design and applied in undergraduate and graduate education in university in Vietnam. This work includes Standard Cell Library (SCL) and Wire-Load Model (WLM). A complete library of 47 standard cells are designed and the methodology is ensured through schematic design, layout design, as well as pin capacitance, timing, power dissipation models. In this paper, the SCL design methodology, layout design and methodology for creating characteristics have been developed based on 180nm CMOS technology using a supply voltage of 1.8v. EDA environment and Ocean script are used for design and simulations.