TAONoC: A Regular Passive Optical Network-on-Chip Architecture Based on Comb Switches

Abstract

Optical networks on chip (ONoC) has been proposed as a promising alternative paradigm for electronic NoC with the benefit of optical signaling communications such as ultrahigh bandwidth, extremely low energy consumption, and negligible transmission latency. To accommodate the layout of tile-based chip multicore processors, a torus-based passive ONoC architecture, TAONoC, is proposed in this paper. Relying on the unique designs of three function modules, TAONoC can still support contention-free communication without the need for arbitration. TAONoC employs comb switches instead of general microring resonators (MRs). TAONoC has a low demand for the number of MRs because of the ultrahigh utilization of resonant wavelengths owned by a single MR. Simulation results show that TAONoC performs well under three different synthetic traffic patterns.