System-level modelling and implementation technique for run-time reconfigurable systems

Abstract

This paper presents a system-level approach for modelling and implementing hardware-software systems, which contain Run-Time Reconfigurable (RTR) hardware. The developed technique provides management and scheduling of RTR tasks from system-level simulations to synthesizable VHDL descriptions. The developed technique was implemented using OCAPI-xl - a system-level modelling and implementation tool based on C + + libraries. The proposed approach allows designers to explore the tradeoffs between implementation of system partitions in software, static hardware, and RTR hardware. After the system has been partitioned, an OCAPI-xl-based design flow can be utilized for implementation of all the system components.