Abstract
In this paper a systematic top-down design method for analog-to-digital converters is presented. Starting at a very high level, with only specifications for the DR, SNDR and bandwidth, the converter architecture is selected. This is followed by high level simulation. The results are then used in a building-block topology selection step, followed by an automatic sizing step and full transistor-level simulation. In this case a continuous-time delta-sigma modulator, suited for wideband CDMA, was designed. The circuit was manufactured in a 0.18 μm CMOS technology and reaches more than 60 dB SNDR in a bandwidth of 1.92 MHz.
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