Abstract

The increasing complexity of electronic design can present project teams with problems, many of which can occur in the interpretation and implementation of the initial product specification. As the design description becomes more detailed, the assessment of compliance to specification becomes more difficult. Thus an approach is required which spans the entire design process from initial specification to detailed circuit implementation, yet supports the natural design techniques for the different design stages. By combining VHDL (which can be used for both abstract behavioural descriptions and detailed gate level design) with standard graphical notation, a suitable design environment can be realized. Furthermore, the use of a graphical representation is more natural to a broader base of engineers and can assist in the adoption of VHDL as a design tool.

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